Embodiments of the present invention relate to a thin film transistor liquid crystal display and a manufacturing method thereof.
Thin film transistor liquid crystal displays (TFT-LCDs) have been developed rapidly in recent ten years and have prevailed in the market of flat panel display.
A TFT-LCD mainly comprises an array substrate, a color filter substrate and a liquid crystal layer sandwiched between the array substrate and the color filter substrate. For example, the array substrate of the TFT-LCD is typically manufactured by a 4-mask patterning process. The 4-mask patterning process may comprise the following steps: forming a gate line and a gate electrode by a first patterning process with a normal mask; forming an active layer, a data line, a source electrode, a drain electrode and a TFT channel region by a second patterning process with a half-tone mask or a gray-tone mask; forming a passivation layer via hole, a gate pad via hole and a data pad via hole by a third patterning process with a normal mask; and forming a pixel electrode by a fourth patterning process with a normal mask. The pixel electrode is connected with the drain electrode through the passivation layer via hole.
In manufacturing the array substrate of the TFT-LCD, the step of forming via holes is a very important step. Through the via holes formed in this step, the pixel electrode is connected with the drain electrode of the thin film transistor, and desirable connections are obtained at the gate pad region and the data pad region. FIG. 11a to FIG. 13b are views showing a process of forming via holes in a conventional method of manufacturing a TFT-LCD array substrate, and the process of forming via holes is described as follows.
FIGS. 11a and 11b are structural views after applying a photoresist layer in the conventional method of manufacturing a TFT-LCD array substrate. FIG. 11a is a sectional view taken at the position of a thin film transistor, and FIG. 11b is a sectional view taken at the position of a gate pad region. On the substrate with a gate line 11, a gate electrode 12, a gate insulating layer 3, an active layer (comprising a semiconductor layer 4 and a doped semiconductor layer 5), a date line, a source electrode 6 and a drain electrode, a photosensitive resin layer 8 is applied, as shown in FIG. 11a and FIG. 11b. 
FIGS. 12a and 12b are structural views after an exposing and developing process in the conventional method of manufacturing a TFT-LCD array substrate. FIG. 12a is a sectional view taken at the position of the thin film transistor, and FIG. 12b is a sectional view taken at the position of the gate pad region. The photoresist layer is exposed by using a normal mask and then developed to form a first via hole 21 and a third via hole 23. The first via hole 21 is provided above the gate line 11 in the gate pad region to expose a portion of the gate insulating layer 3, and the third via hole 23 is provided above the drain electrode 7 of the thin film transistor to expose a portion of the drain electrode, as shown in FIGS. 12a and 12b. 
FIGS. 13a and 13b are structural views after an etching process in the conventional method of manufacturing a TFT-LCD array substrate. FIG. 13a is a sectional view taken at the position of the thin film transistor, and FIG. 13b is a sectional view taken at the position of the gate pad region. By the etching process, the gate insulating layer 3 in the second via hole 22 is etched away to expose a portion of the gate line 11, as shown in FIGS. 13a and 13b. 
In above-described process of forming via holes, an etching process is included and many apparatus are employed. Therefore, the above process has the disadvantages of low production efficiency, high manufacture cost and the like.